Besides the underfills for stress relief of BGA packages for solder-reflow interconnections, with more semiconductor design and packaging utilizing fan-in and fan-out wafer level packaging (FO-WLP), underfill that can manage large area chip with copper pillar and gold bumps down to less than 35μm and advancing toward 25μm required different underfilling technology and solution.
AI Technology, Inc. (AIT) have been utilizing its proprietary modified cyanate ester technology to provide both extra-high glass transition (Tg) and low viscosity for fast chip underfill successfully in the last few years. UF-MC7883-FP is a new generation of capillary underfill solution that have been proven to provide stress relief for chips with less than 35μm gap. With close to 80% fill with engineered micron sized silica, coefficient of thermal expansion (CTE) has been controlled to less 16 ppm/°C. The demonstrable low CTE and high Tg enable UF-MC7883-FP to provide slight compressive stress and low shear stress for WLP and package-on-package (PoP) and chiplets devices.
With AIT proprietary stress absorbing modified cyanate ester technology along with its controlled low CTE, even at high Tg of close to 220°C, the shear stress is controlled to minimal level to allow passing of the extreme thermal cycling requirements from -65°C to 150°C for the larger dies of 20mmx20mm. The inherent higher temperature stability of the cyanate ester molecular backbone, its has found some extreme applications at temperature beyond 175°C as well.